Karnaugh Maps

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Introduction

Logic design implies the analysis, synthesis, minimization, and implementation of binary functions. Combinational logic refers to networks whose output is strictly dependent on the inputs. The analysis of such networks requires first the writing of the Boolean algebraic equation representative of the network, and then the complete characterization of the output as a result of all the possible combinations of the inputs. Minimization involves reducing the Boolean algebraic expression to some minimal form.
Any minimization tool in Boolean is based on the algebraic theorems. Algebraic reduction of Boolean functions is not easy and requires considerable experience, judgement and luck. It becomes more apparent as the complexity of the function increases.

For example the two input variable expression as AB*+A*B* (* - complemented variable) is obviously dependent only on B*.But it is not so obvious that the following three input expression AB*+B*C+A*C is represented by AB*+A*C.

As a result extensive effort has been devoted toward developing techniques, aids or tools, that will allow the logic designer to minimize a function. The Venn diagram, Veitch diagram, Karnaugh map, Quine-McCluskey method, and other techniques have all been developed with but one objective-to allow the designed to arrive at a minimal expression as rapidly as possible with the least amount of effort.

Among these methods the Karnaugh Maps (made by G. Karnaugh in 1953) will be presented bellow.

The Karnaugh map is an orderly arrangement of squares with assignments such that the difference between any two adjacent squares is a one-variable change. The map must contain a square or cell for each unique combination of input variables. A map for two variables A and B must have four cells, because there are 22 different combinations of two input variables. A map for three variables A, B and C must contain 23 or eight cells, and a map on n variables must contain 2n cells. An assignment of 1 for uncomplemented variable and 0 for a complemented variable is made. For instance, a term AB*C is equivalent to the binary notations 101. The table bellow shows the ways to define each cell of two, three and four variables functions.
The alphabetical input variables are identified at the upper left-hand corner of the box. For example, for three input variable function, the diagonal lines indicates that the variables A and B are represented by the binary notations across the top of the matrix (which is a Gray Code with the unique property of only a single bit change when going from one state to the next) and are contained in the vertical column below each assignment. The variable C is designed down the side of the matrix and is represented by horizontal rows within the matrix. Each cell represents a unique combination of the variables.

The Karnaugh map technique is thought to be the most valuable tool available for dealing with Boolean functions. It provides instant recognition of the basic patterns, can be used to obtain all possible combinations and minimal terms, and is easily applied to all varieties of complex problems. Minimization with the map is accomplished through recognition of basic patterns.
The appearance of 1’s in adjacent cells immediately identifies the presence of a redundant variable.
The following figures illustrate some examples of minimizing with a three-variable map and four-variable map.[1]

Karnaugh Map examples

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T71.jpg T72.jpg
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RULES SUMMARY

No zeros allowed.

No diagonals.

Only power of 2 number of cells in each group.

Groups should be as large as possible.

Every one must be in at least one group.

Overlapping allowed.

Wrap around allowed.

Fewest number of groups possible.

Sample problems

Sample problem 1

Karnaugh Map to minimize a digital circuit

Initial circuit Karnaugh Map AND/OR circuit
C2IN1.jpg
T2IN1.jpg
C2OUT1.jpg

Sample problem 2

Karnaugh Map to minimize a digital circuit

Initial circuit Karnaugh Map AND/OR circuit
CIR6 A.jpg T6n.jpg C6b.jpg

Sample problem 3

Karnaugh Map to minimize a digital circuit

Initial circuit Karnaugh Map AND/OR circuit
C4IN1.jpg T4IN1N.jpg
C4OUT1.jpg

1. William E. Wickes, Logic Design with Integrated Circuits, John Willey & Sons, Inc, New York-London-Sydney